國立清華大學資訊工程學系

Department of Computer Science

National Tsing Hua University

專題演講

SEMINAR

主講人：Prof. Jih-Kwon Peir,

SPEAKER (University of Florida)

題　目：Comparative Studies of RISC-V ISA

TOPIC     

時  間：108年01月11日(五)上午11點至12點

DATE　　

地　點：台達館 525室

PLACE

摘要：

ARM Instruction Set Architecture (ISA) has been dominated mobile CPUs for many years. Lately, a research group at UC-Berkeley proposed a new RISC-V ISA which is open software for both research and education purposes as well as for business applications. In this talk, we will give a general description about ISA for different CPUs, a software/hardware interface and introduce the new RISC-V. We will describe assembly instructions in RISC-V including the base integer instructions, different extensions, and their encoding formats. In addition, designs of CPU pipeline execution unit and related issues will also be presented. Pros and cons of using RISC-V for business development will be mentioned.   

    聯絡人：金仲達教授.