賀!資工系王俊堯教授團隊榮獲2018 IEEE International Symposium on VLSI-DAT Best Paper Award
Best Paper Award
Starting 2009, an Award Committee is formed for the selection of the Best Paper Award each year. The selection criteria of the award include the technical contents and writing quality of the paper as well as the quality of the presentation at the symposium. The award will be presented to the selected paper in the following year's symposium.
2018 Award Winners Congratulations !
The 2018 Best Paper Award will be granted in the VLSI-DAT Opening ceremony in 2019 and the winner will be rewarded by a certificate and US$500 . Besides, it will also offer the registration fee waived of 2019 VLSI-DAT.
• A 1.86mJ/Gb/Query Bit-Plane Payload Machine Learning Processor in 90nm CMOS
Co-authors: Fang-Ju Ku, Tung-Yu Wu, Yen-Chin Liao, Hsie-Chia Chang, Wing Hung Wong and Chen-Yi Lee
National Chiao Tung University
• Using Range-equivalent Circuits for Facilitating Bounded Sequential Equivalence Checking
Co-authors: Yung-Chih Chen, Wei-An Ji, Chih-Chung Wang, Ching-Yi Huang, Chia-Cheng Wu, Chia-Chun Lin and Chun-Yao Wang
National Tsing Hua University
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