1.Advanced 2.5D and 3D packaging technology development.
2.Design flows, including APR, EM/IR, Thermal, and SI/PI, enablement.
3.Design kits generation and QA.
4.3DIC solution adoption support with key customers.
 

Qualifications

1. 3-year technical experience and knowledge of digital APR flows.
2. Familiar with design solutions provided by either one of listed EDA vendors: Ansys, Cadence, Mentor, and Synopsys.
3. Good programing skills, such as C++, Python, Perl, Tcl.
4. Self-motivated with ability to solve complex problems.
5. Excellent verbal and written communication skills in English.

Please send resume to Hsin-Po Wang, hpwangh@tsmc.com.

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